000 | 00797nam a2200229Ia 4500 | ||
---|---|---|---|
008 | 191130s2006##################000#0#eng## | ||
020 | _a9780071445641 | ||
022 | _a2006271457 | ||
040 |
_aACL _cACL |
||
082 | _a621.392 NAV | ||
100 | _aNavabi, Zainalabedin | ||
245 |
_aVerilog digital system design : RT level synthesis, testbench, and verification _cZainalabedin Navabi |
||
250 | _a2nd ed | ||
260 |
_aNew York _bMcGraw-Hill _c2006 |
||
300 | _axvi, 384 p. : ill. ; 24 cm. + 1 CD-ROM (4 3/4 in.) | ||
500 | _aIncludes bibliographical references and index | ||
650 | _aElectronic digital computers - Computer-aided design | ||
650 | _aVerilog (Computer hardware description language) | ||
990 | _a7c1ae1cdac10000c317fad8acd6bc29a | ||
991 | _a192125 | ||
999 |
_c88532 _d88532 |