000			00762nam a2200217Ia 4500
008			191130s2008##################000#0#eng##
020			_a9780070252219
040			_aACL _cACL
082			_a621.392 NAV
100			_aNavabi, Zainalabedin
245			_aVerilog digital system design : RT level synthesis, testbench and verification _cZainalabedin Navabi
250			_aSpecial Indian ed
260			_aNew Delhi _bTata McGraw-Hill _c2008
300			_axvi, 384 p. : ill. ; 23 cm
500			_aIncludes bibliographical references and index
650			_aElectronic digital computers - Computer-aided design
650			_aVerilog (Computer hardware description language)
990			_a1e40a7abac10000c0c0b57972a6a2f25
991			_a427269
999			_c88531 _d88531