000 | 00910nam a2200253Ia 4500 | ||
---|---|---|---|
008 | 191130s2003##################000#0#eng## | ||
020 | _a9781402074714 | ||
022 | _a2003048950 | ||
040 |
_aACL _cACL |
||
082 | _a621.395 VAN | ||
100 | _aVandenbussche, J | ||
245 |
_aSystematic design of analog IP blocks _cby J. Vandenbussche, G. Gielen, M. Steyaert |
||
260 |
_aDordrecht ; Boston _bKluwer Academic Publishers _c2003 |
||
300 | _axii, 193 p. : ill. ; 25 cm | ||
500 | _aIncludes bibliographical references (p. [183]-193) | ||
650 | _aIntegrated circuit layout | ||
650 | _aIntegrated circuits - Very large scale integration - Design and construction | ||
650 | _aMetal oxide semiconductors, Complementary - Design and construction | ||
700 | _aGielen, Georges | ||
700 | _aSteyaert, Michiel | ||
990 | _afb333edfac10000c1ba7f2e841ca3e4e | ||
991 | _a14889 | ||
999 |
_c391694 _d391694 |