| 000 | 00864nam a2200241Ia 4500 | ||
|---|---|---|---|
| 008 | 191130s1998##################000#0#eng## | ||
| 020 | _a9780792381846 | ||
| 022 | _a98023993 | ||
| 040 |
_aACL _cACL |
||
| 082 | _a621.3815 HUA | ||
| 100 | _aHuang, Shi-Yu | ||
| 245 |
_aFormal equivalence checking and design debugging _cby Shi-Yu Huang and Kwang-Ting (Tim) Cheng |
||
| 260 |
_aDordrecht ; Boston _bKluwer Academic Publishers _c1998 |
||
| 300 | _axviii, 229 p. ; 24 cm | ||
| 500 | _aIncludes bibliographical references (p. [211-222) and index | ||
| 650 | _aApplication specific integrated circuits - Design and construction | ||
| 650 | _aElectronic circuit design - Data processing | ||
| 650 | _aIntegrated circuits - Verification | ||
| 700 | _aCheng, Kwang-Ting | ||
| 990 | _a37f0e9a1ac10000c2f9955b4c6b16155 | ||
| 991 | _a153932 | ||
| 999 |
_c186952 _d186952 |
||