Navabi, Zainalabedin <br/><br/>
Verilog digital system design : RT level synthesis, testbench and verification 
Zainalabedin Navabi 
 - Special Indian ed 
 - New Delhi  Tata McGraw-Hill  2008 
 - xvi, 384 p. : ill. ; 23 cm 
<br/><br/> Includes bibliographical references and index 
<br/><br/><label>ISBN: </label>9780070252219 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Electronic digital computers - Computer-aided design<br/>Verilog (Computer hardware description language)
<br/><br/><label>Dewey Class. No.: </label>621.392 NAV