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Verilog digital system design : RT level synthesis, testbench and verification Zainalabedin Navabi

By: Publication details: New Delhi Tata McGraw-Hill 2008Edition: Special Indian edDescription: xvi, 384 p. : ill. ; 23 cmISBN:
  • 9780070252219
Subject(s): DDC classification:
  • 621.392 NAV
Item type: Books
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Current library Call number Status Date due Barcode
Anna Centenary Library 621.392 NAV (Browse shelf(Opens below)) Available 257116

Includes bibliographical references and index

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