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Design verification with E Samir Palnitkar
Publication details: Upper Saddle River, NJ Prentice Hall PTR 2004Description: xl, 363 p. : ill. ; 24 cmISBN:- 9780131413092
- 2003058089
- 62 392 PAL
| Current library | Call number | Status | Date due | Barcode | |
|---|---|---|---|---|---|
| Anna Centenary Library | 62 392 PAL (Browse shelf(Opens below)) | Available | 213819 |
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| 62 39028553 ZWO Digital system design with SystemVerilog | 62 3916 ASH Digital design : an embedded systems approach using VHDL | 62 392 HWA Digital logic and microprocessor design with VHDL | 62 392 PAL Design verification with E | 62 392 PED Digital electronics and design with VHDL | 62 392 ROT Digital systems design using VHDL | 62 395 COO Digital electronics with PLD integration |
Includes bibliographical references (p. 353-354) and index
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