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Systematic design of analog IP blocks (Record no. 391694)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00910nam a2200253Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 191130s2003##################000#0#eng## |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781402074714 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 VAN |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Vandenbussche, J |
| 245 ## - TITLE STATEMENT | |
| Title | Systematic design of analog IP blocks |
| Statement of responsibility, etc | by J. Vandenbussche, G. Gielen, M. Steyaert |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | Dordrecht ; Boston |
| Name of publisher | Kluwer Academic Publishers |
| Year of publication | 2003 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xii, 193 p. : ill. ; 25 cm |
| 500 ## - GENERAL NOTE | |
| General note | Includes bibliographical references (p. [183]-193) |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Integrated circuit layout |
| Topical Term | Integrated circuits - Very large scale integration - Design and construction |
| Topical Term | Metal oxide semiconductors, Complementary - Design and construction |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Gielen, Georges |
| Personal name | Steyaert, Michiel |
| 991 ## - | |
| -- | 14889 |
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