Search the Library Catalogue
A unified approach for timing verification and delay fault testing (Record no. 359815)
[ view plain ]
| 000 -LEADER | |
|---|---|
| fixed length control field | 00916nam a2200253Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 191130s1998##################000#0#eng## |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9780792380795 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3950287 SIV |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Sivaraman, Mukund |
| 245 ## - TITLE STATEMENT | |
| Title | A unified approach for timing verification and delay fault testing |
| Statement of responsibility, etc | Mukund Sivaraman and Andrzej J. Strojwas |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | Boston |
| Name of publisher | Kluwer Academic |
| Year of publication | 1998 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xv, 155 p. : ill. ; 25 cm |
| 500 ## - GENERAL NOTE | |
| General note | Includes bibliographical references (p. [139]-152) and index |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Delay faults (Semiconductors) |
| Topical Term | Digital integrated circuits - Design and construction - Data processing |
| Topical Term | Digital integrated circuits - Testing |
| Topical Term | Integrated circuits - Verification |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Strojwas, Andrzej J |
| 991 ## - | |
| -- | 194521 |
| Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Date acquired | Full call number | Accession Number | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|
| Anna Centenary Library | Anna Centenary Library | 17.10.2020 | 621.3950287 SIV | 263880 | 17.10.2020 | English Books |