Verilog digital system design : RT level synthesis, testbench, and verification
Navabi, Zainalabedin
Verilog digital system design : RT level synthesis, testbench, and verification
Zainalabedin Navabi
- 2nd ed
- New York McGraw-Hill 2006
- xvi, 384 p. : ill. ; 24 cm. + 1 CD-ROM (4 3/4 in.)