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Chip design for submicron VLSI: CMOS layout and simulation

Uyemura, John P

Chip design for submicron VLSI: CMOS layout and simulation John P. Uyemura - New Delhi Cengage Learning India Private Limited 2006 - xvi, 411p. : ill

Includes index

ISBN: 9788131501955

Subjects--Topical Terms:
VLSI

Dewey Class. No.: 621.395 UYE

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Chip design for submicron VLSI: CMOS layout and simulation

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